Design a serial 2's complementer with a shift register and a flip-flop. The binary number is shifted out from one end of the shift register, and it's 2's complement. Design a serial 2's complementer with a shift register and a flip flop. The binary number is shifted out from one side and it's 2's complementer shifted in to the other side of the shift register.
First look at the operation of the D type flip flop The sequence starts by a reset so Q = 0 The input to the D-type is made up from the initial output (Q) which is OR'd with the first (LSB) bit of the number you are complimenting (X). The output Y is XOR'd with Q and X (00 > 0, 01 >1) as Q is '0' we don't have to consider any other case. So initially the output at Y will always be the same as input at X i.e our LSB data bit. The initial input at 'D' will also be the same as the input at X (X OR '0' = X) Let's take a number - say 28. In binary this would be 00011100 To change this to its 2's compliment we invert and add 1 00011100 --> 11100011 ---> +1 ----> 11100100 So if our circuit works a 00011100 input it will produce a 11100100 output Start with a reset so that Y = X (Q = '0') Q (t+1) = D (t) D is X OR Q Y is X XOR Q LSB first X Q D Y 0 0 0 0 0 0 0 0 1 0 1 1 1 1 1 0 1 1 1 0 0 1 1 1 0 1 1 1 0 1 1 1 Look at the diagonal relationship between D and Q. Q in the next row (t+1) is simply the value of D in the previous row (at time t).
Caverns of doom rules pdf download. Each time the bit is CLOCKED 't' moves on 1. The rest is simply applying the logic of the connected gates to produce a value.